Análisis y simulación en Matlab del método de detección y corrección de errores Reed-Solomon (204,188) utilizado en la norma ISDB-Tb e implementación en un FPGA

Abstract

This titling project focuses on analyzing the structure of Reed-Solomon encoder, it aims to make a complete description of the encoding and decoding Reed-Solomon used in international standard for terrestrial digital television ISDB-Tb. The construction of an algorithm for the encoder and decoder are raised using the Matlab tool and subsequent implementation on an FPGA Spartan 3E VHDL card in order to analyze and understand the functioning within the structure of the digital television standard. For understanding and presentation of the algorithms it is elaborated a friendly graphical user interface where the objective of this project will be verified. This interface has five components, each with a specific function. The coding stage takes the signal information entered by the user and coded. The modulation stage coupled to the encoded information for transmission over a channel. The noise generating step, alters the information in the channel to generate random errors before arrival at the receiver. The demodulation stage retrieves the information encoded with errors. Finally the decoding step detects and corrects errors to give the user the original word.